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HI3516DRBCV300

更新时间:2018-11-28 15:15:16 信息编号:242104929
  • 面议

  • 北京

  • 其它

  • HI3516DV300

13428933052 0755-83570866-803

13428933052

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详情介绍

HI3516DRBCV300

产品别名
AI新品
面向地区
产地
北京
导电类型
其它
产品性质
新品
处理信号
其它
封装
BGA
型号
其它
营销方式
库存
Key Specifications
Processor Core
•Dual-core ARM Cortex-A7@ 900 MHz, 32 KB I-cache, 32 KB D-cache, 256 KB L2 cache
•Neon acceleration and integrated FPU
VEDU
•H.264 BP/MP/HP
•H.265 MP
•I-/P-frames and SmartP reference.
•MJPEG/JPEG baseline
VEDU Performance
•Up to 2688-pixel wide and 2688 x 1944 resolution for H.264/H.265 encoding and decoding. Only the decoding of self-encoded streams is supported..
•Real-time multi-stream H.264/H.265 encoding and decoding:
− 2688 x 1536@30 fps encoding +720 x 480@30 fps encoding + 360 x 240@30 fps encoding
− 2688 x 1944@20 fps encoding +720 x 480@20 fps encoding + 360 x 240@20 fps encoding
− 1920 x 1080@30 fps encoding + 720 x 480@30 fps encoding + 1920 x 1080@30 fps decoding
•JPGE encoding and decoding performance: 16M (4608 x 3456) @10 fps
•Five bit rate control modes (CBR, VBR, FixQp, AVBR, and QpMap)
•Up to 50 Mbit/s output bit rate
•Up to 8-ROI encoding
Smart Video Analysis
•Neural network acceleration engine with processing performance up to 1.0 TOPS
•Smart computing acceleration engine (including tracking and face image correction)
Video and Graphics Processing
•3DNR, image enhancement, and DCI
•Anti-flicker processing for video and graphics output
•1/15–16x video and graphics scaling
•Video graphics overlay
•90°, 180°, and 270° image rotation
•Image mirroring and flipping
•Up to 8-region OSD overlay before encoding
ISP
•3A functions (AE, AF, and AWB), supporting third-party 3A algorithms
•FPN removal and DPC
•LSC, LDC, and purple fringing correction
•Direction-adaptive demosaic
•Gamma correction, DCI, and color management and enhancement
•Region-adaptive dehaze
•Multi-level NR (including BayerNR and 3DNR), detail enhancement, and sharpening enhancement

Local tone mapping
•Sensor built-in WDR and 2F WDR (line-based/frame- based/DCG)
•Video-/Gyro-based 6-DoF IS
•ISP tuning tools for the PC
Audio Encoding and Decoding
•Multi-protocol audio encoding and decoding (G.711, G.726, and ADPCM) by using software
•Audio 3A functions (AEC, ANR, and ALC)
Security
•Secure boot
•Hardware-based memory isolation
•Hardware-based encryption and decryption algorithms (including AES, DES, 3DES, and RSA)
•Hardware-based HASH algorithms (SHA1/SHA256/HMAC_SHA/HMAC_SHA256)
•Hardware random number generator
•8-kbit OTP storage space
Video Interface
•VI
−2-channel VI
Up to 2688-pixel wide and 2688 x 1944 resolution for input of the first channel
Up to 2048-pixel wide and 2048 x 1536 resolution for input of the second channel
−8-/10-/12-/14-bit RGB Bayer DC timing VI
−BT.601, BT.656, and BT.1120 VI interfaces
−MIPI, LVDS/sub-LVDS, and HiSPi
−Compatibility with mainstream HD CMOS sensors provided by vendors such as Sony, ON, OmniVision, and Panasonic
−Compatibility with the electrical specifications of parallel and differential interfaces of various sensors
−Programmable sensor clock output
•VO
−One BT.656/BT.1120 VO interface
−6-/8-bit RGB serial LCD VO and 16-/18-/24-bit RGB parallel LCD VO
−4-lane MIPI-DSI VO
−HDMI 1.4 output with a maximum resolution of 1080p60
Audio Interface
•Audio codec, supporting 16-bit input and output
•Mono-channel differential MIC input for background NR
•Single-end dual-channel input
•I2S interface for connecting to external audio codec
Peripheral Interface
•POR
•High-precision RTC
•2-channel LSADC
•I2C interfaces, SPIs, and UART interfaces
•Three PWM interfaces
•Two SDIO 3.0 interfaces, supporting the 3.3 V/1.8 V level

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